21st IEEE Latin-American Test Symposium

Jatiúca (Maceió), Brazil, 30th March - 2nd April 2020

 

THANK YOU FOR YOUR CONTRIBUTION!

 

Under the special circumstances, we hope that we have been able to prepare a very interesting technical program for all participants. We would like to take the opportunity to thank all participants as well as all those have contributed to this year's edition. We hope you are all healthy and keep up the great work!

 

 

Natural beauty: the "falesias" at Gunga beach

THE 2020 EVENT

 

The IEEE Latin-American Test Symposium (LATS) is a recognized test and fault tolerance techniques forum attended by professionals from all over the world, in particular from Latin-America, to present and discuss various aspects of system, board, and component testing as well as design, manufacturing and in-field considerations with fault tolerance in mind. All presented papers will be submitted to IEEE Xplore Digital Library  and the best papers of its 21st edition will be invited to re-submit to IEEE Design&Test, Journal of Electronic Testing: Theory and Applications (JETTA - Springer), Journal of Low Power Electronics (JOLPE - American Scientific Publishers), and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

 

 

Topics of interest include but are not limited to:

 

- Automatic Test Generation

- Built-In Self-Test

- Defect-Based Test

- Design and Synthesis for Testability

- Design for Electromagnetic Compatibility

- Design for Reliable Embedded Software

- Design Verification / Validation

- Economics of Test

- Fault Analysis and Diagnosis

- Fault Modeling and Simulation

- Fault-Tolerance in HW/SW

 

 

 

 

- Fault-Tolerant Architectures

- Memory Test and Repair

- On-Line Testing

- Process Control & Measurements

- Radiation / Electromagnetic Interference

- Hardening Techniques

- Software Fault-Tolerance

- Software On-Line Testing

- System-on-Chip Test

- Test Resource Partitioning

- Yield Optimization

- Hardware Security

PAPER SUBMISSION INFORMATION

 

On behalf of the organizing committee, we would like to thank all those who already contributed with their submissions. Soon we will have concluded our thorough review process and notify all authors regarding the selection results.

 

For additional information, please contact our Program Co-Chairs:

 

Victor Champac – INAOE, Mexico   Tiago Balen, UFRGS, Brazil

champac[email protected]                       [email protected]

 

 

IMPORTANT DATES

 

Notification of Acceptance:  January 20th, 2020

Camera Ready: February 5th, 2020.

 

 

 

To download the Call for Papers, please click [here].

 

 

 

 

SPONSORS

 

Financial Co-Sponsors:

 

 

 

 

 

 

Technical Co-Sponsors:

 

The Institute of Electrical and                                        Test Technology

Electronics Engineering, Inc.                                         Technical Council